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80188EB processor (Intel) 2nd
80x86 family (Intel)

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Ada
address bus
address bus tests
addresses vs. pointers
ADEOS (example)
    clock tick
    context switch [See context switches]
    mutexes 2nd
    ready list
    scheduler [See scheduler]
    scheduling
    scheduling points
    tasks [See tasks]
AMD 29F010 Flash memory
APIs (application programming interfaces)
application software
Arcom board 2nd
    AMD 29F010 Flash memory
    debug monitor
    I/O map
    Intel 80188EB processor 2nd
    interupt map
    LEDs
    memory map
    Zilog 85230 serial controller
as (GNU assembler)
ASIC
assembler
assembly 2nd
    hand-coded, optimizing
    inline assembly
    startup code

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bcc (Borland's C++ Compiler)
binary semaphore
Blinking LED program (example) 2nd
    building
    debugging
    Timer class with
board support package
Borland's C++ Compiler
Borland's Turbo Assembler
Borland's Turbo Debugger
breakpoints 2nd
build process
    Blinking LED program (example)
    compiling
    converting programs to binary
    linking object files
byte-oriented communication

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C
    pointers vs. addresses
    startup code
C++
    classes
    constructors
    default parameter values
    destructors
    operator overloading
    performance penalty
    pointers vs. addresses
    polymorphism
    startup code
    virtual functions
C-front technology
checksums
CircBuf class
CISC
clock ticks
code optimization
    dead code elimination
    decreasing code size 2nd
    increasing efficiency
    reducing memory usage
COFF (Common Object File Format)
commercial operating systems
compiler
compiling programs
    Blinking LED program (example)
    optimization
context, task 2nd
context switches 2nd 3rd
control registers
converting programs to binary
cost of development
cost of production
counting semaphore
CPU
CRCs (cyclic redundancy codes)
    as checksums
critical sections 2nd 3rd
cross-compilers 2nd
    startup code
crt0.s file
cyclic redundancy codes (CRCs)

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Das Blinkenlights [See Blinking LED program]
data bus
data bus tests
data structures overlaying registers
dead code elimination
deadline
deadlock 2nd
debug monitor
debugger
debugging
    debug monitors
        emulators vs.
    hardware testing, tools for
    LED as success indicator
    logic analyzers and oscilloscopes
    optimized programs and
    remote debuggers
    simulators
decrement test
default parameter values
delay() (example)
dereferencing memory
design requirements
development cost
device drivers 2nd
    Timer driver (example)
    tracking state of
device programmer 2nd 3rd
device registers
digital signal processors (DSPs) 2nd
digital watches
direct memory access (DMA)
disabling interrupts
DMA (direct memory access) 2nd
downloading embedded software
    remote debuggers for
    into ROM
DRAM 2nd
DRAM controllers
DSPs (digital signal processors) 2nd

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EEPROM 2nd
electrical wiring problems
ELF (Extended Linker Format)
embedded C++ standard 2nd
embedded operating systems
    ADEOS (example)
    real-time
    selecting third-party
embedded systems, defined 2nd
emulators 2nd 3rd
EPROM 2nd
executable
external peripherals

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FIFO scheduling
filesystem, creating with Flash memory
firmware
fixed-point arithmetic
Flash drivers
Flash memory 2nd 3rd 4th 5th
creating filesystem with
floating-point calculations

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gcc (GNU C/C++ compiler)
gdb (GBU debugger)
general-purpose computers 2nd
global variables
GNU tools
    assembler (as)
    compiler (gcc)
    debugger (gdb)
    linker (ld)
goto statements

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hand-coded assembly
hardware 2nd
    breakpoints
    debugging
    device drivers and
    electrical wiring problems
    external peripherals
    initializing 2nd 3rd
    input and output devices
    processors
    tracking state of
    troubleshooting
header files for boards 2nd
headers of object files
heap
heap size, limiting
Hello, World! program (example) 2nd
.hex files
high-level language
HLL
host
hybrid memory devices 2nd

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I/O
I/O device
I/O map
I/O-mapped registers
I/O space
i8018xEB class
ICE
idle task
improperly inserted memory chips
in-circuit emulators (ICEs)
increment test
infinite loops, role of
initializing
    DRAM
    hardware 2nd 3rd
inline assembly
inline functions
input and output
    I/O map
    output devices
instruction pointer
Intel 80188EB processor 2nd
Intel 80x86 family
Intel Hex Format
interrupt keyword
interrupt latency
interrupt service routines (ISRs) 2nd 3rd 4th 5th 6th
interrupt type
interrupt vector
interrupt vector table
interrupts 2nd
    interrupt maps
    latency
intertask communication
irrelevant code elimination
ISRs (interrupt service routines) 2nd 3rd 4th 5th 6th

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Java

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latency, interrupt
ld (GNU linker)
LED as success indicator
libgloss package (GNU)
library routines
lifetime of system
linkers 2nd
linking object files
Blinking LED program (example)
locators 2nd
logic analyzers 2nd
loops, infinite

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map files
Mars Pathfinder
memory 2nd
    DMA (direct memory access)
    Flash memory 2nd 3rd 4th
    improperly inserted chips
    missing chips
    peripherals vs.
    pointers vs. addresses
    reducing usage of
    testing
        address bus
        common problems
        data bus
        device
        example of
        test strategy
    types of
    validating contents of
memory map 2nd
memory-mapped I/O
memory-mapped registers
memory space
microcontrollers 2nd
microprocessors 2nd 3rd
missing memory chips
monitor
multiprocessing
multitasking 2nd
    context switches 2nd
    deadlock and priority inversion
    scheduler 2nd
    synchronization
Mutex class (example)
mutexes 2nd
mutual exclusion

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native compilers 2nd
native word size
newlib package (Cygnus)
NVRAM 2nd

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object code
object files 2nd
    contents of
    headers
    linking
        Blinking LED program (example)
    reset code
    startup code 2nd 3rd
on-chip peripherals
one-time programmable (OTP) devices 2nd
opcode
operating systems 2nd
    ADEOS (example)
    context switches 2nd
    deadlock
    priority inversion
    real-time 2nd 3rd
    schedulers 2nd
    selecting third-party
    synchronization
optimizing code
    dead code elimination
    decreasing code size 2nd
    increasing efficiency
    reducing memory usage
oscilloscopes 2nd
OTP devices 2nd
output [See input and output]
overlapping memory locations

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P2LTCH register (Arcom board)
parallel processing
Pathfinder mission (NASA)
PCB (peripheral control block)
performance
    C++ language penalty
    optimizing code
    real-time systems
peripherals 2nd
    control and status registers
    device driver design
    external
    on-chip
    Timer driver (example)
    tracking state of
physical address
platforms
pointers to device registers
pointers vs. addresses
polling 2nd
power-of-two addresses
preemptive scheduling 2nd
printing text strings (example)
priority
priority-based scheduling
priority inversion 2nd
process
processor family
processor-independent
processors 2nd
    communicating with
    electrical wiring problems
    emulating 2nd
    examining
    Intel 80188EB 2nd
    processing power
production cost
profilers 2nd
program counter
programs
    debugging
        emulators 2nd
        remote debuggers
        simulators for
    downloading into ROM
    software build process [See build process]
PROM 2nd

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race condition
RAM 2nd 3rd
ready list
readyList class 2nd
real-time systems 2nd 3rd 4th 5th
real-time tracing
recursive
reentrant
references, unresolved
register
register variables
reliability of system
relocatable
remote debuggers
reset address
reset code 2nd
reset vector
RISC
ROM
    downloading software into
    inserting into the board
    reducing usage
    ROM emulators
    types of
ROM emulator
ROM monitor
round robin scheduling
RTOS [See real-time systems]
running task

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SCC (serial communications controller)
    Zilog 85230
SCC class
Sched class (example)
scheduler 2nd 3rd
scheduling points
semaphores 2nd
serial ports
    Zilog 85230 serial controller
SerialPort class (example) 2nd
shortest-job-first scheduling
simulators 2nd
size of code, decreasing 2nd
software [See also operating systems]
    infinite loops, role of
    optimizing code
    platforms
software build process [See build process]
software interrupt
SRAM 2nd
    testing (example)
stack
stack frame
stack size reductions
standard library routines
startup code 2nd 3rd 4th
    hardware initialization and
startup.asm file 2nd
startup.obj file
states of operating system tasks
status registers
strings, printing (example)
structures overlaying registers
switch statement
symbol tables
symbols, unresolved
synchronization

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table lookups
target
Target188EB board [See Arcom board]
Task class
TaskList class
tasks 2nd
    ADEOS (example)
    context switches 2nd
    deadlock
    priority inversion
    scheduler 2nd
    states of
    synchronization
    task control blocks
tasm (Borland's Turbo Assembler)
tcrom locator
tdr command
testing memory
    common problems
    example of
    test strategy
text, printing (example)
thread
Timer class (example) 2nd
    Blinking LED with
Timer driver (example)
TimerCounter data structure (example)
tlink command
tload utility
tracepoint
tracing, real-time
tracking hardware/driver state
trap
troubleshooting
    deadlock and priority inversion
    hardware
    memory testing
        common problems
        example of
        test strategy
    validating memory contents
    watchdog timers
Turbo Assembler (Borland)
Turbo Debugger (Borland)

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unresolved symbols/references

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waiting (doing nothing) 2nd
walking 1's test
watchdog timers 2nd
wiring problems
word size
worst-case performance

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Zilog 85230 serial controller 2nd